No.7（2012）1.Realization of a High Precision Differentiator Using FPGA

Yasuaki Kaneda, Yasuharu Irizuki

  In this paper, we reduce velocity sensors from control systems by implementing velocity estimators in FPGA. In order to implement other peripherals in FPGA, we require differentiators with small circuit size and high precision. Recently, a pseudo differentiator has been proposed with a very simple structure that could also have a small circuit size. However, this pseudo differentiator has large discretization errors. In this paper, we reduce the discretization errors of the pseudo differentiator through Richardson extrapolation (RE) and fractional delay (FD). In general, FD is implemented by approximate methods, such as Lagrange FIR interpolators. In this paper, we show that the implementation of FD is equivalent to the realization of a high sampling rate (HSR) system, and we realize the HSR system using FPGA. Numerical simulations and experiments show the effectiveness of the proposed differentiator.

Keywords
Differentiator, Velocity estimation, Richardson extrapolation, Fractional delay, FPGA

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