No.4（2009）9.A reconfiguration-based approach for reducing power consumption of embedded systems with FPGAs

Mamoru Ohara, Yasuharu Irizuki, Yuichirou Shimizu

  In recent years, an increasing number of embedded systems have been equipped with Field Programmable Gate Array (FPGA) chips. An FPGA is a special kind of IC, in which user-defined logic circuits can be configured freely. Using FPGAs, small and medium-sized enterprises can more easily equip a dedicated IC designed for low-volume production. One disadvantage of FPGA against a common IC is its high power consumption. This makes it difficult to use FPGAs in some applications such as battery-powered equipment. In this paper, we discuss the power consumption of an evaluation board mounting an FPGA by means of simulation and actual measurements. From these results, we propose an approach for reducing the expected total power consumption of embedded systems with FPGAs, in which we will reconfigure an FPGA so that we use both simple and low-power circuits and more complex and faster circuits as the situation demands. We also introduce our studies on dynamic reconfiguration techniques for implementing such an approach on embedded FPGA systems.

Keywords

FPGA, embedded systems, low power, reconfiguration

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